Some Versal devices contain a two-dimensional AI Engine or AI Engine-ML array. Each tile in the array contains: an AI Engine, a high-performance VLIW vector (SIMD) processor; integrated data memory; and interconnects for streaming, configuration, and debug. Alongside the tiles is the AI Engine array interface that provides the necessary logic to connect the AI Engine array to the other resources in the PL, processing system, and the NoC. For devices with the AI Engine-ML , the array includes additional rows of 512 KB memory tiles.
See the Versal Architecture and Product Data Sheet: Overview (DS950) for devices that contain an AI Engine or AI Engine-ML .
You can access documentation for the AI Engine from the AI Engine Documentation Landing Page (UG1720). For more information about an AI Engine array, see the following: