The following table shows the X5PLL_S2P ports.
| Port Name | Width | Input/Output | Clock Domain | Description |
|---|---|---|---|---|
| RIU_ADDR | [7:0] | Output | RIU address | |
| RIU_CLK | Output | RIU clock | ||
| RIU_NIBBLE_SEL | Output | RIU nibble select. When TRUE, RIU interface is enabled. | ||
| RIU_RDATA | [15:0] | Input | Read data from RIU interface. | |
| RIU_RST | Input | RIU reset. | ||
| RIU_WR_DATA | [15:0] | Output | Write data for the RIU interface. | |
| RIU_WREN | Output | Assert High to enable writes to the RIU. RIU write data also requires that RIU_RD_VALID is High. | ||
| RIU2XCV_CA | Input | Serial RIU address | ||
| RIU2XCV_CK | Input | Serial RIU clock | ||
| RIU2XCV_WR | Input | Serial RIU write data | ||
| XCV2RIU_CK | Output | Serial RIU clock to RIU interface | ||
| XCV2RIU_RD | [3:0] | Output | Serial RIU Data to RIU interface |