The following table shows the X5PHIO_DCCINVBUF ports.
| Port Name | Width | Input/Output | Clock Domain | Description |
|---|---|---|---|---|
| A | Input | X5PLL CLKOUTPHY_0 or CLKOUTPHY_90 input. Each X5PHIO_DCCINVBUF contains dedicated routing to either the CLKOUTPHY_0 or CLKOUTPHY_90 clock source. | ||
| OVERRIDE_CODE | [3:0] | Input | Duty cycle correction input value. | |
| OVERRIDE_SEL | Input | Select. | ||
| ZN | Output | DCC corrected output. |