X5IO IOB Supported Single-Ended Standards - AM010

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)
Document ID
AM010
Release Date
2025-05-22
Revision
1.7 English
Table 1. Supported Single-Ended Standards in X5IO IOB
IOSTANDARD Required VCCO Level for Input and Output Required INTERNAL_VREF Level for Input Drive and Termination Options
HSTL_I_12 1.2V 0.6V OUTPUT_IMPEDANCE, ODT (SPLIT)
HSUL_12 1.2V 0.6V OUTPUT_IMPEDANCE, ODT (SINGLE to VCCO)
LVCMOS10 1.0V N/A DRIVE: 2, 4, 6, 8
LVCMOS11 1.1V N/A DRIVE: 2, 4, 6, 8
LVCMOS12 1.2V N/A DRIVE: 2, 4, 6, 8
LVSTL_11 1.1V 0.183V OUTPUT_IMPEDANCE, ODT (SINGLE to GND)
LVSTL05_10 1.0V 0.125V OUTPUT_IMPEDANCE, ODT (SINGLE to GND)
LVSTL06_12 1.2V 0.150V OUTPUT_IMPEDANCE, ODT (SINGLE to GND)
POD10 1.0V 0.7V OUTPUT_IMPEDANCE, ODT (SINGLE to VCCO)
POD11 1.1V 0.77V OUTPUT_IMPEDANCE, ODT (SINGLE to VCCO)
POD12 1.2V 0.84V OUTPUT_IMPEDANCE, ODT (SINGLE to VCCO)
SSTL10 1.0V 0.5V OUTPUT_IMPEDANCE, ODT (SPLIT)
SSTL11 1.1V 0.55V OUTPUT_IMPEDANCE, ODT (SPLIT)
SSTL12 1.2V 0.6V OUTPUT_IMPEDANCE, ODT (SPLIT)