Single-Ended Bidirectional Buffer Primitives - Single-Ended Bidirectional Buffer Primitives - AM010

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)
Document_ID
AM010
Release_Date
2025-05-22
Revision
1.7 English
Figure 1. Single-Ended Bidirectional Buffer Primitives

Table 1. IOBUFE3, IOBUF, and IOBUF_DCIEN Attributes
Attribute Values Description
DRIVE 2, 4, 8, 12 Specifies the drive strength of the output.
SLEW SLOW, FAST, MEDIUM Specifies the slew rate of the output.
IOSTANDARD See XP IOB Supported Standards Assigns an I/O standard to the element.
USE_IBUFDISABLE TRUE, FALSE Enables IBUFDISABLE (IOBUFE3, IOBUF_DCIEN only).
Table 2. IOBUFE3, IOBUF, and IOBUF_DCIEN Ports
Port I/O Description
IO Inout Inout port connection. Connect directly to top-level port in the design.
O Output Output path of the buffer.
I Input Input port connection. Connect directly to top-level port in the design.
T Input Tristate enable input signifying whether the buffer acts as an input or output.
IBUFDISABLE Input Disables the input buffer and forces the O output to the internal logic to a logic Low when asserted High (IOBUFE3, IOBUF_DCIEN only).
DCITERMDISABLE Input Control to enable/disable input termination. This is generally used to reduce power in long periods of an idle state (IOBUFE3, IOBUF_DCIEN only).
OSC[3:0] Input This is not a supported port and must be left unconnected.
OSC_EN[1:0] Input This is not a supported port and must be left unconnected.
VREF Input Connect to XPIO_VREF (IBUFE3 only).