Many attributes traditionally associated with ports can be set via port constraints as well as through the X5PHIO_XCVR_X2. This section describes port constraints with XDC examples. However, in many instances where the X5IO PHY is used, the X5IO Wizard might apply constraints to the X5PHIO_XCVR_X2.
I/O Standard
Each IOB is capable of supporting an array of differential and single-ended I/O standards as outlined in X5IO IOB Supported Single-Ended Standards and X5IO IOB Supported Differential Standards. In X5IO banks, these standards must share compatible VCCO with other standards in the same bank. The IOSTANDARD defines the VREF level that is internally derived from VCCO as well as the termination types available (i.e., Termination to VCCO/2, Termination to GND, or Termination to VCCO).
The IOSTANDARD attribute is available to select an I/O standard for all I/O buffers. The supported I/O standards are listed in the section. The IOSTANDARD attribute uses the following syntax in the XDC file:
set_property IOSTANDARD value [get_ports port_name]
Drive Strength Control
LVCMOS drivers (LVCMOS12, LVCMOS11, and LVCMOS10) support output drive strength control to size the driver output strength to the load driven. Assigning the DRIVE property 4, 6, or 8 ensures that the X5IO IOB driver can meet valid logic thresholds for loads of 4, 6, or 8 mA, respectively. The DRIVE attribute uses the following syntax in the XDC file:
set_property DRIVE value [get_ports port_name]
Slew Control
All standards in the X5IO IOB support three different slew rates (Fast, Medium, and Slow) which impact the speed of the driver's edge. For speed-critical applications fast slew rates can allow for faster switching, though Medium and Slow should be used whenever possible to minimize coupling and noise in the system.
The SLEW attribute uses the following syntax in the XDC file:
set_property SLEW value [get_ports port_name]
Internal VREF
The X5IO IOB supports several single-ended standards that typically require an external reference voltage to define the receiver switching threshold levels, known as VREF. In the X5IO IOB, these thresholds must be internally derived from the VCCO bank voltage, and are automatically assigned to the IOB at a predefined level based on the IOSTANDARD selected for the pins. Pins within the same bank can have unique VREF levels that can be set via the APB interface. See X5IO IOB Supported Single-Ended Standards for a list of standards and the associated internal VREF levels. Internal VREF tuning controls the VREF on a per-pin basis. Within a bank, each pin can have its own variation of a given VREF.