Figure 1. IDDRE1 Primitive
| Attribute | Values | Description |
|---|---|---|
| DDR_CLK_EDGE | OPPOSITE_EDGE, SAME_EDGE, SAME_EDGE_PIPELINED | Sets the IDDRE1 mode of operation with respect to the clock edge |
| IS_C_INVERTED | 0 or 1 | Sets a local clock inversion for C input when 1. |
| IS_CB_INVERTED | 0 or 1 | Sets a local clock inversion for CB input. When IS_CB_INVERTED=1, C and CB must be driven by the same global clock buffer. When IS_CB_INVERTED=0, CB must be driven by the same global clock buffer through an inverter. |
| Port | I/O | Description |
|---|---|---|
| Q1, Q2 | Output | IDDRE1 register outputs |
| C | Input | Clock input pin |
| CB | Input | Inverted clock input pin when IS_C_INVERTED = 0 and IS_CB_INVERTED = 0 |
| D | Input | Register input from IOB |
| R | Input | Asynchronous High reset |