Differential Bidirectional Buffer Primitives - AM010

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

Document ID: AM010
Release Date: 2025-05-22
Revision: 1.7 English

Figure 1. Differential Bidirectional Buffer Primitives

Figure 2. Differential Bidirectional DIFF_OUT Buffer Primitives

Table 1. IOBUFDSE3, IOBUFDS, IOBUFDS_COMP, IOBUFDS_DCIEN, IOBUFDS_ODDR, IOBUFDS_DIFF_OUT, and IOBUF_DIFF_OUT_DCIEN Attributes
Attribute	Values	Description
SLEW	SLOW, FAST, MEDIUM	Specifies the slew rate of the output.
IOSTANDARD	See XP IOB Supported Standards	Assigns an I/O standard to the element.
DIFF_TERM	TRUE, FALSE	Turns the built-in differential termination on (TRUE) or off (FALSE).
DQS_BIAS	TRUE, FALSE	Provides pull-up/pull-down feature required for some DQS memory interface pins or provides DC bias for certain LVDS applications.
USE_IBUFDISABLE	TRUE, FALSE	Enables use of the IBUFDISABLE. (IOBUFDSE3, IOBUFDS_COMP, IOBUFDS_DCIEN, IOBUFDS_DIFF_OUT_DCIEN only)

Table 2. IOBUFDSE3, IOBUFDS, IOBUFDS_COMP, IOBUFDS_DCIEN, IOBUFDS_ODDR, IOBUFDS_DIFF_OUT, and IOBUF_DIFF_OUT_DCIEN Ports
Port	I/O	Description
IO	Inout	Inout port connection. Connect directly to top-level P-side port in the design.
IOB	Inout	Inout port connection. Connect directly to top-level N-side port in the design. (IOBUFDS_DIFF_OUT only)
O	Output	Output path of the buffer representing the input path to the device.
OB	Output	Complimentary buffer output representing the input path to the device.
I	Input	Input port connection. Connect directly to top-level P-side port in the design.
IB	Input	Input port connection. Connect directly to top-level N-side port in the design.
T	Input	Tristate enable input signifying whether the buffer acts as an input or output.
IBUFDISABLE	Input	The IBUFDISABLE pin can disable the input buffer and force the O output to the internal logic to a logic-Low when the IBUFDISABLE signal is asserted High. (IOBUFDSE3, IOBUFDS_COMP, IOBUFDS_DCIEN, IOBUFDS_DIFF_OUT_DCIEN only)
DCITERMDISABLE	Input	Control to enable/disable DCI termination. This is generally used to reduce power in long periods of an idle state. (IOBUFDSE3, IOBUFDS_COMPIOBUFDS_DCIEN, IOBUFDS_DIFF_OUT_DCIEN only)
OSC[3:0]	Input	This is not a supported port and must be left unconnected. Offset cancellation value. (IOBUFEDS3 only)
OSC_EN[1:0]	Input	This is not a supported port and must be left unconnected. Offset cancellation enable. (IOBUFEDS3 only)
TM	Input	Tristate enable input for the P-side or master side signifying whether the buffer acts as an input or output. This pin must be connected to the same signal as the TS input. (IOBUFDS_DIFF_OUT, IOBUFDS_DIFF_OUT_DCIEN only)
TS	Input	Tristate enable input for the N-side or slave side signifying whether the buffer acts as an input or output. This pin must be connected to the same signal as the TM input. (IOBUFDS_DIFF_OUT_DCIEN, IOBUFDS_DIFF_OUT_DCIEN only)
IO_0	Input	Input of OBUF when C is driven low (logic 0) (IOBUFDS_ODDR only)
IO_1	Input	Input of OBUF when C is driven high (logic 1) (IOBUFDS_ODDR only)
C	Input	Input select pin (IOBUFDS_ODDR only)