Independent Read and Write Port Width - Independent Read and Write Port Width - AM007

Versal Adaptive SoC Memory Resources Architecture Manual (AM007)

Document ID
AM007
Release Date
2026-06-05
Revision
1.2.1 English
Note: To specify the port widths using the dual-port mode of the block RAM, designers must use the READ_WIDTH_[A|B] and WRITE_WIDTH_[A|B] attributes.

Consider the following rules:

  • Designing a single-port block RAM requires the port pair widths of one write and one read to be set (for example, READ_WIDTH_A and WRITE_WIDTH_A).
  • Designing a dual-port block RAM requires all port widths to be set.
  • In simple dual-port mode, one side of the ports is fixed while the other side can have a variable width. The RAMB18E5 has a data port width of up to 36, while the RAMB36E5 has a data port width of up to 72. Using the block RAM as read-only memory uses only the READ_WIDTH_A/B.