The configurable logic block (CLB) provides the most basic, flexible logic functionality in Versal adaptable computing acceleration platforms (adaptive SoCs). It can map any arbitrary function into programmable resources. Features include:
- Implementation of any arbitrary programmable logic function into functional units (LUTs)
- Flip-flops and latches for state retention and pipelining
- Acceleration of wide arithmetic/logic functions
- Shift registers
- Distributed RAM