Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 Clock Performance - Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 Clock Performance - AM003

Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)

Document ID
AM003
Release Date
2026-06-09
Revision
1.6 English

The Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 devices clock performance includes optional properties such as standard/medium/fast horizontal distribution tracks. The standard/medium horizontal routing tracks are used to improve performance. These properties can be set for a clock to use the improved clock network.

set_property USER_CLOCK_TRACK_GROUP <standard, medium, fast> [get_nets -of
					[get_pins my_bufg_inst/O]]

The Vivado Design Suite place and route tool sets a corresponding CLOCK_TRACK_GROUP property on the net after the place_design is complete.