Impact of Capacitance on PL Power Management

Zynq UltraScale plus MPSoC Power Management

Release Date

PL Power Management includes simultaneously turning off/on the clocks for a clock domain. Please model this effect and increase the capacitance on VCCINT if required. Capacitors and switching loads are discussed in ug583 - UltraScale Architecture PCB Design User Guide , PCB Decoupling Capacitors.