1.4 PL Control

Zynq UltraScale plus MPSoC Power Management

Release Date
  • Work Utilization and Clock Rate (A): Select the PL algorithm and set standard operating parameters.
  • Options (B): Select the PL algorithm and set the non-standard operating parameters.
  • Information i (C): Display information (block diagram) of the PL algorithm. Turn off all the Power Domains (B) (C) (E)
Note: Any change to the PL design controls triggers an update, causing the PL power to rise to maximum, until all PL design controls are incrementally turned off again. The GUI currently follows the "dimmer" flow where all performance starts "on" and performance is incrementally turned off.