Create and Launch Kernel in the Testbench: - 2024.1 English

    // Create a kernel:
    OCL_CHECK(err, cl::Kernel kernel(program, "ISPPipeline_accel", &err));

    for (int i = 0; i < 3; i++) {
    OCL_CHECK(err, q.enqueueWriteBuffer(buffer_inVec,                 // buffer on the FPGA
                                        CL_TRUE,                      // blocking call
                                        0,                            // buffer offset in bytes
                                        vec_in_size_bytes,            // Size in bytes
                                        gamma_lut));

    OCL_CHECK(err, q.enqueueWriteBuffer(buffer_R_IR_C1,               // buffer on the FPGA
                                        CL_TRUE,                      // blocking call
                                        0,                            // buffer offset in bytes
                                        filter1_in_size_bytes,        // Size in bytes
                                        R_IR_C1_wgts));

    OCL_CHECK(err, q.enqueueWriteBuffer(buffer_R_IR_C2,               // buffer on the FPGA
                                        CL_TRUE,                      // blocking call
                                        0,                            // buffer offset in bytes
                                        filter1_in_size_bytes,        // Size in bytes
                                        R_IR_C2_wgts));

    OCL_CHECK(err, q.enqueueWriteBuffer(buffer_B_at_R,                // buffer on the FPGA
                                        CL_TRUE,                      // blocking call
                                        0,                            // buffer offset in bytes
                                        filter1_in_size_bytes,        // Size in bytes
                                        B_at_R_wgts));

    OCL_CHECK(err, q.enqueueWriteBuffer(buffer_IR_at_R,               // buffer on the FPGA
                                        CL_TRUE,                      // blocking call
                                        0,                            // buffer offset in bytes
                                        filter2_in_size_bytes,        // Size in bytes
                                        IR_at_R_wgts));

    OCL_CHECK(err, q.enqueueWriteBuffer(buffer_IR_at_B,               // buffer on the FPGA
                                        CL_TRUE,                      // blocking call
                                        0,                            // buffer offset in bytes
                                        filter2_in_size_bytes,        // Size in bytes
                                        IR_at_B_wgts));

    OCL_CHECK(err, q.enqueueWriteBuffer(buffer_sub_wgts,              // buffer on the FPGA
                                        CL_TRUE,                      // blocking call
                                        0,                            // buffer offset in bytes
                                        sub_wgts_in_size_bytes,       // Size in bytes
                                        sub_wgts));

    if (hdr_en) {
        OCL_CHECK(err, q.enqueueWriteBuffer(buffer_inVec_Weights,     // buffer on the FPGA
                                            CL_TRUE,                  // blocking call
                                            0,                        // buffer offset in bytes
                                            vec_weight_size_bytes,    // Size in bytes
                                            wr_hls));

        OCL_CHECK(err, q.enqueueWriteBuffer(imageToDevice,
                                            CL_TRUE, 0,
                                            image_in_size_bytes,
                                            interleaved_img.data));

    } else {
        OCL_CHECK(err, q.enqueueWriteBuffer(imageToDevice,
                                            CL_TRUE, 0,
                                            image_in_size_bytes,
                                            in_img1.data));
    }
    OCL_CHECK(err, q.enqueueWriteBuffer(buffer_inLut,                 // buffer on the FPGA
                                        CL_TRUE,                      // blocking call
                                        0,                            // buffer offset in bytes
                                        lut_in_size_bytes,            // Size in bytes
                                        casted_lut,                   // Pointer to the data to copy
                                        nullptr));
    // Profiling Objects
    cl_ulong start = 0;
    cl_ulong end = 0;
    double diff_prof = 0.0f;
    cl::Event event_sp;

    // Launch the kernel

    OCL_CHECK(err, err = q.enqueueTask(kernel, NULL, &event_sp));

    clWaitForEvents(1, (const cl_event*)&event_sp);

    event_sp.getProfilingInfo(CL_PROFILING_COMMAND_START, &start);

    event_sp.getProfilingInfo(CL_PROFILING_COMMAND_END, &end);

    diff_prof = end - start;
    std::cout << (diff_prof / 1000000) << "ms" << std::endl;
    // Copying Device result data to Host memory
    q.enqueueReadBuffer(imageFromDevice, CL_TRUE, 0, image_out_size_bytes, out_img.data);
    if (rgbir_en) {
        q.enqueueReadBuffer(imageFromDevice_ir, CL_TRUE, 0, image_out_ir_size_bytes, out_img_ir.data);
    }
}