Otsu Threshold - 2024.1 English

Vitis Libraries

Release Date
2024-05-30
Version
2024.1 English

Otsu threshold is used to automatically perform clustering-based image thresholding or the reduction of a gray-level image to a binary image. The algorithm assumes that the image contains two classes of pixels following bi-modal histogram (foreground pixels and background pixels), it then calculates the optimum threshold separating the two classes.

Otsu method is used to find the threshold which can minimize the intra class variance which separates two classes defined by weighted sum of variances of two classes.

image141

Where, w_1is the class probability computed from the histogram.

image142

Otsu shows that minimizing the intra-class variance is the same as maximizing inter-class variance

image143 image144

Where,image145 is the class mean.

API Syntax

template<int SRC_T, int ROWS, int COLS,int NPC=1, int XFCVDEPTH_IN = _XFCVDEPTH_DEFAULT>  OtsuThreshold(xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_IN> & _src_mat, uint8_t &_thresh)

Parameter Descriptions

The following table describes the template and the function parameters.

Table 681 Table . OtsuThreshold Parameter Description
Paramete r Description
SRC_T Input pixel type. Only 8-bit, unsigned, 1 channel is supported (XF_8UC1)
ROWS Maximum height of input and output image.
COLS Maximum width of input and output image (must be a multiple of 8, for 8-pixel operation)
NPC Number of pixels to be processed per cycle; possible options are XF_NPPC1 and XF_NPPC8 for 1 pixel and 8 pixel operations respectively.
XFCVDEPTH_IN Depth of the input image.
XFCVDEPTH_OUT Depth of the output image.
_src_ma t Input image
_thresh Output threshold value after the computation

Resource Utilization

The following table summarizes the resource utilization of the OtsuThreshold function, generated using Vivado HLS 2019.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1 FPGA, to process a grayscale HD (1080x1920) image.

Table 682 Table . OtsuThreshold Function Resource Utilization Summary
Operating Mode Operating Frequency (MHz) Utilization Estimate
BRAM_18K DSP_48Es FF LUT CLB
1 pixel 300 8 49 2239 3353 653
8 pixel 150 22 49 1106 3615 704

Performance Estimate

The following table summarizes the performance in different configurations, as generated using Vivado HLS 2019.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1, to process a grayscale HD (1080x1920) image.

Table 683 Table . OtsuThreshold Function Performance Estimate Summary
Operating Mode Latency Estimate
Max Latency (ms)
1 pixel operation (300 MHz) 6.92
8 pixel operation (150 MHz) 1.76