3D Look Up Tables (LUTs) may look similar to 1D LUTs in their principle of using value as mapping indexes to get the new value, they differ in the sense that they operate on three independent parameters. This drastically increases the number of mapped indexes to value pairs. For example, a combination of 3 individual 1D LUTs can map 2^n * 3 values where n is the bitdepth, whereas a 3D LUT processing 3 channels will have 2^n * 2^n * 2^n possible values.
Since all those huge number of values cannot be stored, only a subset of them are saved and the remaining values are computed through interpolation. The current implementation supports trilinear interpolation.
API Syntax
template <int LUTDIM, int SQLUTDIM, int INTYPE, int OUTTYPE, int ROWS, int COLS, int NPPC = 1, int URAM = 0, int XFCVDEPTH_IN_1 = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_IN_2 = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_OUT_1 = _XFCVDEPTH_DEFAULT>
void lut3d(xf::cv::Mat<INTYPE, ROWS, COLS, NPPC, XFCVDEPTH_IN_1>& in_img,
xf::cv::Mat<XF_32FC3, SQLUTDIM, LUTDIM, NPPC, XFCVDEPTH_IN_2>& lut,
xf::cv::Mat<OUTTYPE, ROWS, COLS, NPPC, XFCVDEPTH_OUT_1>& out_img,
unsigned char lutdim)
The following table describes the template and the function parameters.
Parameter | Description |
---|---|
LUTDIM | Maximum dimension of input LUT |
SQLUTDIM | Squared value of maximum dimension of input LUT |
INTYPE | Input Pixel Type. XF_8UC3, XF_10UC3, XF_12UC3, XF_16UC3 supported |
OUTTYPE | Output Pixel Type. XF_8UC3, XF_10UC3, XF_12UC3, XF_16UC3 supported |
ROWS | Maximum height of input and output image |
COLS | Maximum width of input and output image |
NPPC | Number of Pixels to be processed per cycle. Only XF_NPPC1 supported |
URAM | Enable to map storage structures to UltraRAM. |
XFCVDEPTH_IN_1 | Depth of the input image. |
XFCVDEPTH_IN_2 | Depth of the input image. |
XFCVDEPTH_OUT_1 | Depth of the output image. |
in_img | Input image |
lut | Input lut |
out_img | Output image |
lutdim | Dimension of input lut |
Resource Utilization
The following table summarizes the resource utilization of the kernel in different configurations, generated using Vitis HLS 2020.2 tool for the Xilinx Alveo U200 FPGA, to process a 4K image.
Operating Mode | Operating Frequency (MHz) |
Utilization Estimate | ||||
---|---|---|---|---|---|---|
BRAM_18K | DSP_48Es | FF | LUT | SLICE | ||
1 pixel | 300 | 30 | 40 | 9182 | 12039| 847 |
Performance Estimate
The following table summarizes a performance estimate of the kernel in different configurations, as generated using Vitis HLS 2020.2 tool for the Xilinx Alveo U200 FPGA, to process 4K image.
Operating Mode | Operating Frequency (MHz) |
Latency Estimate |
---|---|---|
Max (ms) | ||
1 pixel | 300 | 28.5 |