AMD Vitis™ solver library targets to help Vitis kernel developers to accelerate. It provides two layers of APIs, namely L1 and L2. Each tackles different calculation needs.
- L1 APIs are mainly for matrix decomposition, including Cholesky inverse, QR fraction, QR inverse, and SVD. They are designed as HLS components and have memory interfaces, which finally point to BRAM / URAM, do not support memory access to DDR / HBM and can not be called directly from the host side. L1 APIs support a variety of data types, including float / double / complex. For details of data types support, please take reference from documentation. Since L1 APIs need all input data ready in memory, they do have an upper limit to total size of input matrix. For details on how to setup these upper bounds, refer to API’s documentation and test cases. Matrix in L1 API interface are stored as 2D array.
- L2 APIs are kernels running on FPGA cards, including linear solver, matrix inverse, QR factorization, LU decomposition of square matrix, SPD matrix solver, SPD matrix inverse, Cholesky decomposition, Eigen value decomposition, and dense triangular matrix solver. L2 APIs support double precision floating point type. They read DDR/HBM to get the input and write DDR/HBM to output result. They can be called from host side. 2D Matrix in L2 API interface are row-based stored.