While the term Super Sample Rate strictly means the processing of more than one sample per clock cycle, in the AIE context it is taken to mean an implementation using parallel kernels to improve performance at the expense of additional resource use.
In the Hadamard Product, SSR operation is controlled by the template parameter TP_SSR. This parameter is intended to improve performance and also allow support of point sizes beyond the limitations of a single tile.
The parameter TP_SSR allows a trade of performance for resource use in the form of tiles used.
The user may allocate samples to ports in an SSR configuration as desired, so long as the same convention is applied on both input ports. The output samples will simply reflect this pattern. For example, a Hadamard of size 64 and SSR =2 will have 2 input A ports of 32 and 2 input B ports of 32 and two output ports of size 32. If the user chooses to allocate even samples to the first port in each case then the first output port will hold even index sample outputs. If the user chooses to allocate the first 32 samples of A to the first A port and similarly for B, then the first output port will hold the first 32 index samples out.
It should be kept in mind that, individual Hadamard kernels will be processing a vector size of TP_DIM/TP_SSR. The IP performs a ceiling operation on the TP_DIM/TP_SSR to nearest multiple of 32 bytes or 16 bytes depending on the implementation parameters.