The entry points for the VSS are the vss_fft_ifft_pararms.cfg and vss_fft_ifft_1d.mk file present in the L2/include/vss/vss_fft_ifft_1d/ directory in the DSP library. The vss_fft_ifft_1d.mk takes in a user configurable file, say “vss_fft_ifft_pararms.cfg” as input and generates a .vss object as an output after performing all the intermediate steps like generating the necessary AIE and PL products and stitching them together. The user can then integrate this .vss object into their larger design. See Vitis documentation on “Vitis Subsystems” for details on how to include a .vss object into your design.
Please edit the parameters in the cfg file and provide it as input to the vss_fft_ifft_1d.mk file. An example of how to create a vss and include a .vss object in your design is also provided in L2/examples/vss_fft_ifft_1d/example.mk. It creates a vss object, links it to a larger system to create an xclbin and runs hardware emulation of the full design.