Additional Features of FIRs in DSP IP Library - 2025.2 English

Vitis IP Libraries

Release Date
2025-11-20
Version
2025.2 English

Compared to the Vitis Library DSP IP offering, the following enhancements have been made:

  • Memory storage for coefficients has been reorganized. This results in reduced Program Memory (PM) usage, and reduced data memory usage.
  • RTP ports for reloadable coefficients have been restructured, improving both memory footprint and throughput efficiency. No runtime checks are performed, allowing the RTP solution to achieve maximum throughput, nearly matching the performance of static coefficient solutions without any drawbacks.
  • Usability has been improved with the introduction of the update_rtp() method, which streamlines the process of updating coefficients at runtime to a single method call.