Custom Platform Creation Tutorial on Versal - 2024.2 English - XD101

Vitis Tutorials: Platform Creation (XD101)

Document ID
XD101
Release Date
2024-12-13
Version
2024.2 English

Version: 2024.2

In this module, we treat the VCK190 board as a customized solution tailored to our customer’s specific needs. We leverage the AMD Versal™ Adaptive SoC Extensible Part Support Example Design, a pre-built Linux common image, and the Device Tree Blob generated during the platform creation process to produce essential software components. These components form the foundation of a dedicated embedded Versal acceleration platform tailored for the customer’s board. Finally, you will test this platform by running several applications.

If your goal is simply to create a platform for kernel validation, then the Vitis Platform Quick Start offers a streamlined approach.

For your reference, the overall structure of this example system closely resembles the following:

[AMD Official Use Only -General]5PLHardwareSoftwareARM Trusted FirmwareAXI interruptKernel(vadd/ aie)……EthernetEMMCUARTSDUSBDPHDMIButtonLEDSWITCHGPIO DriverZOL/XRT DriverInterrupt DriverUSB DriverSD DriverI2C DriverEthernet DriverQSPI DriverDDR DriverXRTVector AdditionAPPClockgeneratorUserKernelSTEP3STEP2STEP1ARM resourcesPL resourcesData & control stream vck190DDR4Bottom left below the application is the platform created in step1 and step2. Kernel is not inside the platform, it is added and linked in step3.XCVC1902A72*2R5F*2QSPIAI EngineNOC

In a general Vitis acceleration platform design, the Vitis platform and application development can be divided into these parts:

  1. Platform hardware design creation in the AMD Vivado™ Design Suite. It exports an XSA file with clock, reset, AXI interface, and interrupt signals and properties.

  2. Platform software preparation with common image or using PetaLinux tool, including Linux kernel, rootfs, device tree, and boot components.

  3. Platform creation in Vitis to combine all hardware and software components and generate XPFM description.

  4. Create applications in Vitis against the platform. Vitis generates a host application, xclbin, and sd_card.img.

  5. Write sd_card.img to a SD card or update host application and xclbin to an existing SD card.

In this module, you will utilize the Versal Extensible Part Support Design (CED) to create a hardware design. In contrast to the Versal Extensible Design, which is used in Vitis Platform Quick Start, the part support design takes a slightly different approach. Specifically, it empowers you to handle board-level configurations independently. This includes configuring processing system (PS) side peripherals and fine-tuning parameters related to double data rate (DDR) as needed. This flexibility ensures that you have full control over the configuration process to meet the unique requirements of your application.

To prepare the software components, you will use the common image provided by AMD. The Device Tree Blob (DTB) will be generated automatically during the platform creation process if the DTB generation option is enabled. Once both the software and hardware components are ready, you will proceed to package the platform.

In each step, you will validate the generated files to make sure they work as expected. A frequent test methodology can help to narrow down the root causes if any error occurs. Lastly, you will run several test applications on this platform to test this platform.

The total flow is similar the following:

[AMD Official Use Only -General]VivadoPetalinuxVitis/XSCTSTEP1STEP2VitisxclbinelfSTEP3Platform CreationApplication DevelopmentCommon ImagecreatedtsXSAxpfmdtbSoftware components can be generated from Petalinuxor extracted from common image. We suggest using software components from the common image as it can expedite the process ofplatform creationUboot,bl31,rootfs,Image,sdk.shValidation1Validation2

Navigate through these steps with the following table of contents links.

  • Step 1: Create a Hardware Design

  • Step 2: Create a Vitis Platform

  • Step 3: Run Applications on the Vitis Platform

  • Iteration Guidelines

  • Frequently Asked Questions