Add Interrupt Support - Add Interrupt Support - 2025.2 English - XD101

The V++ linker can automatically link the interrupt signals between kernel and platform. The available interrupt signals in the platform are exported by PFM.IRQ property.

For simple designs, interrupt signals can be sourced by processor’s pl_ps_irq. The limitation is that it can only provide a maximum of 16 interrupt signals. To provide more interrupt signals, use AXI Interrupt Controller. You can also enable AXI HPM0 LPD to control the AXI Interrupt Controller. In the next steps, you have to add the AXI Interrupt Controller and enable interrupt signals for PFM.IRQ.

1. Enable AXI HPM0 LPD to control the AXI Interrupt Controller

   1. In the block diagram, double-click the Zynq UltraScale+ MPSoC block.

   2. Select PS-PL Configuration > PS-PL interfaces > Master interface.

   3. Enable the AXI HPM0 LPD option.

   4. Expand the arrow before AXI HPM0 LPD. Check the AXI HPM0 LPD Data width settings and keep it as default 32.

   5. Disable AXI HPM0 FPD and AXI HPM1 FPD.

   6. Click OK to finish the configuration.

      Note:

      • AXI HPM0 LPD is used mainly for controlling purposes. It reads and writes 32-bit control registers. If the interface has more than 32 bits, AXI Interconnect or SmartConnect will perform the AXI bus width conversion using PL logic. However, it would cost logic resource and introduce unnecessary latency.

      • AXI HPM0 FPD and AXI HPM1 FPD are reserved for kernel usage. Disabling them from the block diagram can prevent auto connection using it by accident. Unused AXI interfaces can be exported in the Platform Setup, irrespective of its visibility in the block diagram.

2. Add the AXI Interrupt Controller and configure it.

   1. Right-click Diagram view and select Add IP, search and add AXI Interrupt Controller IP. It is instantiated as axi_intc_0.

   2. Double click the AXI Interrupt Controller block, change Interrupt Output Connection to Single so that it can be connected to PS IRQ interface.

   3. Click OK.

3. Connect AXI Interfaces of axi_intc_0 to AXI HPM0 LPD of PS.

   1. Click Run Connection Automation

   2. Review the settings (axi_intc_0 is enabled, s_axi is to be connect to /zynq_ultra_ps_e_0/M_AXI_HPM0_LPD).

   3. Set Clock Source for Slave Interface and Clock Source for Master Interface to /clk_wiz_0/clk_out2(200 MHz).

   4. Click OK.

   Note: In this example, the interrupt controller and most kernel IRQ signals are synchronous to one clock for stability. It is okay to have asynchronous IRQ if kernels are running at different clocks. The interrupt controller can also handle asynchronous IRQ with level interrupt signals.

4. Connect IRQ of the Interrupt Controller by connecting axi_intc_0.irq to zynq_ultra_ps_e_0.pl_ps_irq[0:0]

   Note: If you have more than one IRQ signals to connect to pl_ps_irq of PS, use a concat IP to concatenate them to a bus and then connect the bus to pl_ps_irq.

5. Enable interrupt signals for the platform.

   1. Go to Platform Setup tab.

   2. Go to Interrupt tab.

   3. Enable intr under axi_intc_0.

   4. Tcl console shows the corresponding Tcl command for this setup:

      set_property PFM.IRQ {intr { id 0 range 32 }} [get_bd_cells /axi_intc_0]
      

At this stage, the IPI design connection will look as shown in the following diagram: