Version: Vitis 2026.1 and Vivado 2026.1
Welcome to the Vitis Getting Started tutorial for the VEK385 EDF flow.
This tutorial showcases the steps to build an AI Engine 2-PS (AIE2-PS) graph along with a host application, and run the design in hardware emulation (QEMU) and on the VEK385 board.
This tutorial uses the pre-built vek385_base_reva.xpfm platform from the Vitis installation (${PLATFORM_REPO_PATHS}/vek385_base_reva/vek385_base_reva.xpfm) to compile the AIE2-PS kernels.
The pre-built VEK385 platform has:
Base part: PS and PS-to-NoC-DDR connectivity
Extensible part: PL and AIE regions
The base part serves as the foundation to generate the EDF WIC image. The extensible part is later linked with the AIE2-PS kernels, producing a fixed XSA that is used to build the host application and the device PDI.
Note: The CED-design-based platform enables segmented configuration by default. The PS-NoC-to-LPDDR is used to initialize the LPDDR memory and provide access to it during system bring-up. For more details, refer to UG1273.
This tutorial is aligned with the AMD Embedded Development Framework (EDF). For more information, see the official AMD EDF Wiki page.
Please go through the Makefile and makefile_aie2ps provided in this tutorial to better understand the Vitis EDF tool flow.