VCK190 - VCK190 - 2026.1 English - XD098

Version: Vitis 2026.1

Welcome to Vitis Getting Started!

This tutorial discusses the important concepts of the Vitis tool flow, building the components, building the design and running the design on the hardware and hardware emulation.

This tutorial uses pre-built xilinx_vck190_base_202610_1.xpfm from Vitis installation path to compile HLS and AIE kernels.

Please read the tutorial in the same order as listed here to better understand the Vitis tool flow. At the end of each section, a link to the next chapter is included.

***Note: Most of the documentation below is Generic and platform independent.

1. Understanding the Vitis Tool Flow

2. Getting Started with Designing using the Vitis Tool

3. Running the Hardware Emulation

4. Running the design on a VCK190 Evaluation Board

Prerequisites

1. Source Vitis 2026.1:

   source <path_to_vitis_install>/settings64.sh
   

2. Export the following variable:

   export COMMON_IMAGE_VERSAL=<path_to_common_image: xilinx-versal-common-v2026.1>
   

3. To compile the binaries:

   cd <path_to_Tutorial>/Getting_Started/Vitis/Versal_w_PetaLinux/VCK190/
   make all
   

   Please refer Makefile for more details on the commands.

Ensure you have the following installed on your machine:

• Vitis tools

• Versal AI Core Series VCK190 Evaluation Kit

• Common Image

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