PL to Processor Cross Triggering - 2025.1 English - XD260

Vitis Tutorials: Embedded Software (XD260)

Document ID
XD260
Release Date
2025-07-31
Version
2025.1 English

Another very useful feature is the ability to debug between the hardware and software domains. To build use the command below

cd Vitis_Cross_Probing/scripts
make build_sw LAB=2

This will create a gpio_test application for the cortexa53_0. The application has a while loop, that will just wait on data on the AXI GPIO

int main(void)
{
	int Status;
	//volatile int Delay;

	/* Initialize the GPIO driver */
#ifndef SDT
	Status = XGpio_Initialize(&Gpio, GPIO_EXAMPLE_DEVICE_ID);
#else
	Status = XGpio_Initialize(&Gpio, XGPIO_AXI_BASEADDRESS);
#endif
	if (Status != XST_SUCCESS) {
		xil_printf("Gpio Initialization Failed\r\n");
		return XST_FAILURE;
	}

	/* Set the direction for all signals as input */
	XGpio_SetDataDirection(&Gpio, 1, 0xFFFFFFFF);
	
	Xil_DCacheDisable();

	while (1) {
		XGpio_DiscreteRead(&Gpio, 1);
	}

}

Open the lab2 workspace in Vitis, and follow the steps below

  1. Highlight the gpio_test, and under FLOW, select Debug and Open Settings. Then select New Launch Configuration

  2. Select the Enable Cross Triggering as shown below ../../../../_images/gpio_test_launch_config.PNG

  3. Select Cross Triggering Breakpoints, and Add Item and configurate as shown below. For example, here we want to trigger the Cortex a53 #0 when there is a trigger on the ILA ../../../../_images/gpio_test_cross_triggering_breakpoints.PNG

  4. Select the Debug icon to launch the debug ../../../../_images/gpio_test_debug.PNG

  5. Launch Vivado Hardware Manager, and connect to your target Note: If you are using the prebuilt XSA, then import the ltx file manually. ../../../../_images/hardware_device_properties.PNG

  6. Add the trigger condition. For example, here I added a trigger on the RDATA as shown below ../../../../_images/trigger_condition.PNG

  7. Return to Vitis, and In the Debug View, highlight the Cortex-A53 #0 and select Continue (play icon). This will loop on the XGpio_DiscreteRead(&Gpio, 1) line. ../../../../_images/gpio_test_continue_execution.PNG

  8. There is a VIO connected to the GPIO input and output pins. We can use the VIO to for an AXI transaction. ../../../../_images/vio.PNG

  9. This will cause a breakpoint to occur on the Cortex-A53 #0 as shown below ../../../../_images/gpio_test_breakpoint_cortexa53-0.PNG