cells[0].report_property()
This will look similar to below
Property Type Read-only Value
ADDRESS_TAG string true
BD_TYPE string true
CLASS string true cell
CONFIG_BMG_INSTANCE string true EXTERNAL
CONFIG_C_BRAM_ADDR_WIDTH string true 11
CONFIG_C_BRAM_INST_MODE string true EXTERNAL
CONFIG_C_ECC string true 0
CONFIG_C_ECC_ONOFF_RESET_VALUE string true 0
CONFIG_C_ECC_TYPE string true 0
CONFIG_C_FAMILY string true zynquplus
CONFIG_C_FAULT_INJECT string true 0
CONFIG_C_MEMORY_DEPTH string true 2048
CONFIG_C_RD_CMD_OPTIMIZATION string true 0
CONFIG_C_READ_LATENCY string true 1
CONFIG_C_SINGLE_PORT_BRAM string true 0
CONFIG_C_S_AXI_ADDR_WIDTH string true 13
CONFIG_C_S_AXI_BASEADDR string true 0xA0010000
CONFIG_C_S_AXI_CTRL_ADDR_WIDTH string true 32
CONFIG_C_S_AXI_CTRL_DATA_WIDTH string true 32
CONFIG_C_S_AXI_DATA_WIDTH string true 32
CONFIG_C_S_AXI_HIGHADDR string true 0xA0011FFF
CONFIG_C_S_AXI_ID_WIDTH string true 1
CONFIG_C_S_AXI_PROTOCOL string true AXI4
CONFIG_C_S_AXI_SUPPORTS_NARROW_BURST string true 1
CONFIG_Component_Name string true mpsoc_preset_axi_bram_ctrl_0_0
CONFIG_DATA_WIDTH string true 32
CONFIG_ECC_ONOFF_RESET_VALUE string true 0
CONFIG_ECC_TYPE string true 0
CONFIG_EDK_IPTYPE string true PERIPHERAL
CONFIG_EDK_SPECIAL string true BRAM_CTRL
CONFIG_FAULT_INJECT string true 0
CONFIG_ID_WIDTH string true 0
CONFIG_MEM_DEPTH string true 2048
CONFIG_PROTOCOL string true AXI4
CONFIG_RD_CMD_OPTIMIZATION string true 0
CONFIG_READ_LATENCY string true 1
CONFIG_SINGLE_PORT_BRAM string true 0
CONFIG_SUPPORTS_NARROW_BURST string true 1
CONFIG_USE_ECC string true 0
CONFIGURABLE bool true 0
CORE_REVISION string true 13
DRIVER_MODE string true
HIER_NAME string true
IP_NAME string true axi_bram_ctrl
IP_TYPE enum true MEMORY_CNTLR
ISPDEFINST bool true 0
IS_HIERARCHICAL bool true 0
IS_PL bool true 1
MULTISOCKETSMP string true
NAME string true axi_bram_ctrl_0
PRODUCT_GUIDE string true http://www.xilinx.com/cgi-bin/docs/ipdoc?c=axi_bram_ctrl;v=v4_1;d=pg078-axi-bram-ctrl.pdf
SLAVES string* true []
SLR_NUMBER int true -1
VLNV string true xilinx.com:ip:axi_bram_ctrl:4.1
Again, users can print a specific cell object property
Vitis [0]: print(cells[0].CONFIG_C_S_AXI_HIGHADDR)
0xA0011FFF
Users can also just use the filter the cells. For example, if users wanted to find a specific cell with IP_NAME as axi_gpio
axi_gpio = HwDesign.get_cells(hierarchical='true',filter='IP_NAME==axi_gpio')
This will return (if found) the cell object for the cell with property IP_NAME as axi_gpio
Vitis [0]: print(axi_gpio)
axi_gpio_0
A more useful filter, would be to filter by the IP_TYPE. This could be PERIPHERAL, PROCESSOR, ect. Users can use this filter to find all processors in the XSA
procs = HwDesign.get_cells(hierarchical='true',filter='IP_TYPE==PROCESSOR')
Vitis [0]: print(procs)
psu_cortexa53_0 psu_cortexa53_1 psu_cortexa53_2 psu_cortexa53_3 psu_cortexr5_0 psu_cortexr5_1 psu_pmu_0