Enabling Detailed Prints in FSBL in Vitis Unified IDE - 2024.1 English

1. Launch Vitis Unified IDE, if it is not already open.

2. Set the Vitis workspace. For example, C:\edt\fsbl_debug_info.

3. Select File → New Component → Platform

Screen	System Properties	Settings
Name and Location	Component Name	zcu102_platform
	Component location	default
Select Platform Creation Flow		Hardware Design
	Browse to XSA	Select XSA
Select Platform Creation Flow	Operating System	standalone
	Processor	psu_cortexa53_0
	Generate boot Artifacts	Uncheck

1. The platform generates a default BSP (Domain) called “standalone_psu_cortexa53_0”. However, this domain does not have the required libraries needed for the AMD Zynq™ MP FSBL. You can create the Zynq MP FSBL from the application template and allow the tools to generate the domain.

2. Select Zynq MP FSBL from the Examples.

Note: If the Examples icon is not enabled, then enable this in View -> Examples.

Note: Here, you can see the required libraries; xilffs, xilsecure and xilpm

1. Select Create Application Component from Template and follow the steps below

Screen	System Properties	Settings
Name and Location	Component Name	fsbl_a53
	Component location	default
Select Platform	Name	zcu102_platform
Select Domain
+ create new ...	Name	fsbl_domain
	Display Name	fsbl_domain
	OS	standalone
	Processor	psu_cortexa53_0

1. Click Next and Finish. The Vitis IDE creates the FSBL application component. This uses the zynqmp_fsbl domain template that includes the required libraries.