Create Vitis Platform - 2024.1 English

Vitis Tutorials: Embedded Software (XD260)

Document ID
XD260
Release Date
2024-06-19
Version
2024.1 English

Note: Users can use the HSI Python API to extract the available processors from the XSA. This is discussed later in this tutorial

The Boot Artifacts will be automatically generated. For Zynq Ultrascale this will be the FSBL. If users dont want this, then use the no_boot_bsp = True

platform = client.create_platform_component(name = "base_platform",hw_design = "design_1_wrapper.xsa",os = "standalone",cpu = "psu_cortexa53_0")