tensor_descriptor - 2025.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2025-12-05
Version
2025.2 English

The basis of this class is to describe 2D or 3D volumes. If the dimensionality is higher, multiple 2D/3D structures are concatenated under the hood. Each dimension size is described using ```tensor_dim`` structure which is basically a pair (size,step) each parameter being expressed in data vector entity:

  • size: size of the dimension.

  • step: increment required to take a step in this dimension.

For example:

auto desc = aie::make_tensor_descriptor<int16,16>(aie::tensor_dim(8u,2));
  • The data unit is aie::vector<int16,16>, 32 bytes.

  • 8u : on dimension 0, there are 4 vectors

  • 2: the step is equal to 2 (2 x 32 = 64 bytes) to get the next vector element. This means that the first read vector element will be at address 0 and the following one at address 64.

Suppose that there are 256 int16 elements in the 1D buffer are: 0 1 2 3 4 5 … 253 254 255

  • First extracted vector will be: 0 1 2 3 … 13 14 15

  • Second extracted vector: 32 33 34 35 … 45 46 47

  • Third extracted vector: 64 65 66 … 77 78 79

a multi-dimensional access scheme is just a comma separated list of tensor_dim parameters, starting with the highest dimension:

auto desc = aie::make_tensor_descriptor<int16,16>(
                           aie::tensor_dim(2u,8),  // Dimension 1 description
                           aie::tensor_dim(4u,2)); // Dimension 0 description

The resulting vector extraction would be the same as the previous example. Let’s understand how the data address is computed. Let say that we have a 3-dimension tensor descriptor:

  • (Size2,Step2)  (Size1,Step1)  (Size0,Step0)

  • The current index in each dimension is: (i2, i1, i0)

    • 0 <= i0 < Size0

    • 0 <= i1 < Size1

    • 0 <= i2 : no limitation for last dimension

  • The width of the base vector is W

The starting address for each buffer access is computed as follows:

Offset = buffer address

O2 = W * i2 * Step2 
O1 = W * i1 * Step1
O0 = W * i0 * Step0

Address = Offset + O2 + O1 + O0

Step and Size can be set to get various behaviour:

  • If Step=0 the access scheme described in previous dimensions is repeated Size times.

  • If the Step of some dimension is smaller than the one of a lower dimension then the address generated will go back and forth. (cf. provided example in this tutorial).