Visualizing Deadlock in the Vitis Analyzer - Visualizing Deadlock in the Vitis Analyzer - 2026.1 English - XD100

This topic continues from Deadlock Detection section and shows how to visualize the deadlock (Lock stall and stream stall) in the Vitis Analyzer.

1. After simulating with the --hang-detect-time=60 option, open the trace analysis view -> aie_component -> AIE SIMULATOR/HARDWARE -> Run-aie_component -> Trace.

2. Expand the data_shuffle kernel function. It ran for two iterations and went into a stream stall.

3. Expand the peak_detect kernel function, and observe the lock stall after three iterations. The kernel data_shuffle expects more stream data from peak_detect than it can provide. So, the stream port in the data_shuffle went into the stream stall, and the kernel hangs. It cannot accept more inputs from the buffer port, which causes backpressure on the peak_detect kernel leading to a lock stall, which leads to deadlock.