Next step is to verify the performance of the design.
In the Graph View, select the I/O tab and observe the Throughput column for each ports.
The output of four PLIO ports (PLIO_fft_o_0, PLIO_fft_o_1, PLIO_fft_o_2, PLIO_fft_o_3) throughput shows 2853.55, 2851.97, 2852.36, 2852.76 MB/s, respectively for each ports. To get the throughput in samples per second, divide this throughput by four because the data type used is cint16, which is four bytes in size. This gives a throughput value of for each ports ~713 MSPS. There are four outputs and combined throughput of all output is ~2853 MSPS.
[Optional]: The make throughput command lists the throughput for the FIR and FFT output. It uses a custom Python script which reads the time stamp from the output file and displays the value.
Enter the following command to analyze the throughput:
make throughput_all2
Per the design requirement for design 2, the required sampling rate is 2000 MSPS. The achieved sampling rate is ~2853 MSPS. There are four outputs and combined throughput of all output is ~2853 MSPS.
After completing the review, close the Vitis Analyzer.