Using Vitis Analyzer to look at the Compilation and Simulation Results - Using Vitis Analyzer to look at the Compilation and Simulation Results - 2026.1 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2026-06-23
Version
2026.1 English

Type make aieviz to start vitis_analyzer.

Selecting Graph on the navigation bar shows a diagram of the filter implementation. In this version of the graph, you can now see the two kernels, each implemented in the own AI Engine tile.

Vitis Analyzer Graph

Selecting the Array option on the navigation bar shows the physical implementation of the design on the AI Engine array. You can see the two kernels in the tiles specified by the location constraints.

Vitis Analyzer Array

Selecting the Trace option on the navigation bar shows tile (18,0) (the chan_FIR kernel) spending most of its time running kernel code. Tile (19,0) (hb_FIR) spends significant time being idle in _main. chan_FIR is the bottleneck in this datapath, which is not surprising because it has many more taps to compute.

Note: Ensure that when using trace view, you examine the waveform within the 0 to 50 µs range.

Vitis Analyzer Trace

After examining the design, click File -> Close Window.

In part 3, you use filter parameters to attempt to increase the performance of the chan_FIR filter and the chain.