Uplink Subgraph - Uplink Subgraph - 2025.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2026-03-27
Version
2025.2 English

The UL64A32L uplink subgraph is the reverse of the downlink subgraph. Review the graph definition in the src/inc/subsys.h It consists of four bfCascadingChain subgraphs each of the length of eight beamforming kernels. This subgraph has eight data input ports and 32 coefficient input ports. All four chains receive the same input data. Each chain receives eight of the coefficient input ports each. There are four output data ports, one for each chain.