Throughput and Latency Measurements for fft32_dsplib Design - 2025.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2025-12-05
Version
2025.2 English

The throughput and latency measured using Vitis Analyzer are shown to be 144 ns and 443.2 ns, in the following figures. This throughput level is equivalent to 32/144e-9 = 222 Msps. Note that a higher QoR is achieved by the Vitis DSP library IP.

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The same “batch processing” approach to improving throughput is supported by the Vitis DSP library. Set the TP_WINDOW_SIZE parameter to hold multiple transforms and reduce the overhead. The previous code block is set up to do this using the REPEAT parameter. When set to REPEAT=128, a throughput and latency of 11.14 μs and 22.29 μs are achieved, respectively. This throughput level is equivalent to 128*32/11.14e-6 = 367 Msps. These results are summarized and compared to the earlier design in the table above.