The N-Body Simulator is implemented on an XCVC1902 AMD Versal Adaptive SoC
device on the VCK190 board. It consists of PL HLS datamover kernels from the AMD Vitis Utility Library (mm2s_mp
and s2mm_mp
), custom HLS kernels that enable packet switching (packet_sender
and packet_receiver
), and a 400 tile AI Engine design. Additionaly, the design consists of host applications that enable the entire design, verify the data coming out of the AI Engine, and run the design for multiple timesteps.