Step 4: Run or Debug the System in Hardware using JTAG - 2025.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2025-12-05
Version
2025.2 English

We will now test our system first by booting it through JTAG. As discussed previously, the segmented flow will use two PDI files; boot and PLD. The AIE binaries are applied to the PLD PDI. We have to tell the IDE to use both of them

  1. In the flow navigator, select the A-to-Z_app component and click on the configuration icon which appear on the right of the Run option when you hover it with you mouse missing image

  2. Click on New Launch Configuration

  3. Set up you target connection (local or remote)

  4. Select Load PL PDI and set the path to ${workspaceFolder}/simple_aie_application_system_project/build/hw/package/package/binary_container_1.pdi

  5. Power up the board

The output will be send to UART0.

  1. If you are using a Rev B. board, open a serial terminal to get the UART0. If you are using a RevA, the UART0 is not available through the serial interfaces but is routed to the System Controller for remote UART functionality. To access it, log in to the system controller and set an IP address for the PS ethernet inteface and an IP address of the same network group to your PC (for example 192.168.1.2 and 192.168.1.1). Then open a Telnet Terminal (for example in tera term) and connect to 192.168.1.2:4001 to get the UART0 terminal

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  2. Click on Run. You should see the application running successfully

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