Step 1: Add the PL Kernels - Step 1: Add the PL Kernels - 2026.1 English - XD100

In this example, HLS kernels bridge between memory and the AXI4-Stream interface to input and output data from memory.

• The mm2s kernel reads data from memory and inputs it to the AI Engine array.

• The s2mm kernel receives output data from the AI Engine array and writes it to memory.

1. In the Vitis Unified IDE click File > New Component > HLS

2. Name the first component mm2s and click Next.

3. In the Configuration File page, keep the default settings (Empty File) and click Next

4. In the Add Source Files page, add the file mm2s.cpp from the src folder.

   

5. In the same page, set the mm2s function as the top function (click Browse and select mm2s).

   

   

6. In the Select Platform Page, select Hardware Design select the XSA file generated from the platform creation step (custom_platform_vck190.xsa).

   Click Next.

7. In the Edit Settings page, xo under package.output_format and click Next.

   

8. Open the hls_config.cfg file under settings and change to source editor view. Add the following line under hls:

   [hls]
   flow_target=vitis
   

   

9. Click Finish.

10. Repeat steps 1 to 8 to create another HLS component called s2mm with the s2mm.cpp source file.