Step 1: Add PL Kernels - 2025.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2025-12-05
Version
2025.2 English

In this example, HLS kernels are used which bridge between memory and the AXI4-Stream interface to input and output data from memory.

  • The mm2s kernel reads data from memory and inputs it to the AI Engine array.

  • The s2mm kernel receives output data from the AI Engine array and writes it to memory.

  1. In the Vitis Unified IDE click File > New Component > HLS

  2. Name the first component mm2s and click Next.

  3. In the Configuration File page, keep the default settings (Empty File) and click Next

  4. In the Add Source Files page, add the file mm2s.cpp from the src folder

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  5. In the same page, set the mm2s function as the top function (click Browse and select mm2s)

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  6. In the Select Platform Page:

  • If you have created the platform following step 1, select the base_pfm_vek385 platform you just created.

  • If you have skipped step 1, select the VEK385 base platform (xilinx_vek385_base_202510_1) .

Click Next

  1. In the Edit Settings page select Vitis Kernel Flow Target under flow_target and Generate a Vitis XO under package.output_format and click Next

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  2. Click Finish

  3. In the flow navigator, click on Run under C SYNTHESIS.

  4. In the flow navigator, click on Run under PACKAGE.

  5. Repeat steps 1 to 10 to create another HLS component called s2mm with the s2mm.cpp source file