Stage 1: Create and Simulate the Design - Stage 1: Create and Simulate the Design - 2025.2 English - XD100

On the MATLAB® GUI, select the Home Tab and click Simulink.

Select Blank Model to create a new canvas on which to design the Decimation Chain.

Perform the next two steps to improve usability. Gain instant access to the initialization file and automatically call it when opening or updating the design.

Right-click in the canvas, and select Model Properties:

• Click the Callbacks tab.

• Click PreLoadFcn, and type CreateFilter; in the edit window on the right.

• Click InitFcn, and type CreateFilter; in the edit window on the right.

• Click Apply and OK.

  

Click the canvas, and type subsys. Select the first Subsystem displayed in the list (Subsystem, Simulink/Ports & Subsystem).

• Double-click the subsystem, and remove all blocks inside (CTRL-A and Del).

• Go back to the top level by clicking on the Up-arrow.

• Right-click the Subsystem, and select Properties.

• Click the Callbacks tab.

• Select OpenFcn in the Callback function list.

• Type open('CreateFilter.m'); in the edit window on the right.

• Click Apply and OK.

Double-click this block to open the initialization MATLAB® function (CreateFilter.m) in the MATLAB® editor. Save the model CTRL+S, and assign the name VMC_DSPLib.

Click Library Browser.

In the list of libraries find the AMD Toolbox. This contains four sub-libraries:

• AI Engine

• HDL

• HLS

• Utilities

Click the AI Engine section. This reveals seven subsections:

• DSP

• Interfaces

• Signal Routing

• Sinks

• Sources

• Tools

• User-Defined functions

Click the DSP sub-section. There are two sub-menu entries:

• Buffer IO: which contains filter implementations using frame-based input and output.

• Stream IO : which contains filter implementations using streaming input and output.

Click the Buffer IO sub-section and place the FIR Halfband Decimator block in the canvas as shown in the following figure.

Double-click the FIR Halfband Decimator block to open the GUI. Populate the GUI with the following parameters :

• Input/output data type: cint16

• Filter coefficients data type: int16

• Filter coefficients: hb1_aie

• Input Window size (Number of samples): 2048

• Scale output down by 2: Shift1

• Rounding mode: Floor

• Saturation mode: 0-None

Leave all other settings at their default values. Click Apply and OK.

Now create a data source to feed this filter.

Create the following two blocks by clicking the canvas and typing the beginning of the name of the block. Then enter the given parameters:

Cascade the three blocks: Random Source, Cast, AIE FIR Filter.

The file ReferenceChain.slx contains the decimation chain using Simulink® blocks. Open ReferenceChain.slx. Copy the block HB1 over to your design.

Copy the small set of blocks (To Fixed Size, Subtract, Scope, Vitis Model Composer Hub) to create the following design:

Ensure that the parameter Output Size of the block To Fixed Size is set to 1024.

Set the Stop Time to 5000, and run the design. The FIR filter is compiled and the design is run. The scope should show a completely null difference.

To gain more information about the signals traveling through the wires, update the following display parameters:

• Right-click the canvas, and select Other Displays –> Signals and Ports –> Signal Dimensions.

• Right-click the canvas, and select Other Displays –> Signals and Ports –> Port Data Types.

• Right-click the canvas, and select Sample Time Display –> all.

  After updating the design with CTRL-D, the display should look as follows:

  

  Notice that before implementing the Decimation Filter the vector length was 2048, but after implementation this is reduced to 1024.

Update the design with the other three filters using the following parameters:

Update the Output Size parameter of the To Fixed Size block to 256. The design should display like as follows:

Run the design. The added filters are compiled, and the design is run through the 5000 samples. The difference between the two outputs should be zero.