Scenario 1 - Scenario 1 - 2025.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2026-03-27
Version
2025.2 English
  1. For example, open the src/kernels/data_shuffle.cc, and comment out line 24.

  2. Compile the design by rebuilding the AI Engine Component.

  3. Run x86simulation by selecting Run under X86SIMULATION in Flow navigator.

  4. Observe that the x86simulator detects error and output messages on the console. In addition to that, the file, ${PROJECT_PATH}/Emulation-SW/x86simulator_output/simulator_state_post_analysis.dot, is generated.

    x86simulator --pkg-dir=./Work --i=..
    INFO: Reading options file './Work/options/x86sim.options'.
    x86simulator: Detected deadlock
    Deadlock diagnosis:
    1. main() is waiting on kernel 'mygraph.p_d'
       because Node 'mygraph.p_d' is blocked while writing port 'mygraph.p_d.out[0]'
    2. Node 'mygraph.p_d' is blocked while writing port 'mygraph.p_d.out[0]'
       because Unable to write port 'mygraph.p_d.out[0]'
    3. Unable to write port 'mygraph.p_d.out[0]'
       because Node 'mygraph.d_s' is blocked while reading port 'mygraph.d_s.in[1]'
    4. Node 'mygraph.d_s' is blocked while reading port 'mygraph.d_s.in[1]'
       because Data unavailable from port 'mygraph.d_s.in[1]'
    5. Data unavailable from port 'mygraph.d_s.in[1]'
       because Node 'strmbrdcst_i3_po1' is blocked while reading port 'mygraph.p_d.out[1]'
    6. Node 'strmbrdcst_i3_po1' is blocked while reading port 'mygraph.p_d.out[1]'
       because Data unavailable from port 'mygraph.p_d.out[1]'
    7. Data unavailable from port 'mygraph.p_d.out[1]'
       because Node 'mygraph.p_d' is blocked while writing port 'mygraph.p_d.out[0]'
    Consider rerunning x86simulator with the --trace option.
    Wrote ./x86simulator_output/simulator_state_post_analysis.dot
    Simulation completed successfully returning zero
    

    This is the textual representation of the deadlock path (starting to the end). To get the pictorial representation of the same, use the dot application.

  5. Locate the $(COMPONENT_NAME)/Output/x86sim/x86simulator_output/simulator_state_post_analysis.dot file path in your terminal.

  6. Issue the command dot -Tpng simulator_state_post_analysis.dot > simulator_state_post_analysis.png and open the file.

    dot file

    Paths shown in red indicate the root cause of the deadlock. In this design, observe the graph path ‘n3-c7-n2-c6-n5’, the edge c7 is not sending enough data to the edge c6. From the graph code, in[1] is the stream input of the kernel data_shuffle. This kernel expects stream data every iteration. However, the producer kernel sends one stream output every 16 input samples. This in turn caused the kernel to stop functioning, and the complete design went into the deadlock situation. Hence, the path from node n3 to n5 is also shown as red.

  7. Revert the changes to src/kernels/data_shuffle.cc.