Resource Utilization - 2025.1 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2025-08-25
Version
2025.1 English

The AI Engine resources for the SAR BP engine are shown below. The design uses 14 tiles for compute and 26 tiles overall for compute and buffering. Recall the earlier system partitioning analysis estimated a total of 31 tiles, indicating this initial provisioning was not overly aggressive. The engine requires a total of four GMIO interface ports. The memory footprint of the design is quite large but the mapper/router is able to automatically find a contention-free solution with a simple area group constraint.

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