PL Kernel Analysis - PL Kernel Analysis - 2026.1 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document_ID
XD100
Release_Date
2026-07-20
Version
2026.1 English

The goal of this stage is to determine the exact programmable logic (PL) kernel causing a throughput drop by adding the PL profile monitors and debugging AI Engine with the integrated logic analyzer (ILA).