Limitations - 2025.1 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2025-08-25
Version
2025.1 English

The address generator is limited to 32-bits data. This means that 8-bit data will be read 4 by 4, aligned with 32-bit data:

  • Dimension 0 buffer size must be aligned with 32-bit data

  • Dimension 0 tiling size must be aligned with 32-bit data