The purpose of this tutorial is to demonstrate how to port an AIE-ML reference design to AIE-ML v2 with minimal code changes. You do this by leveraging Vitis Libraries which contain templatized DSP IPs that allow you to target all AI Engine variants.
The tutorial targets the same System Requirements as the original tutorial, and highlights the changes required to build this design.
The following table summarizes the key architectural differences between the two platforms. These differences influence the porting decisions and design optimizations described throughout this tutorial.