I/O Permutations (3D Case) - I/O Permutations (3D Case) - 2026.1 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2026-06-23
Version
2026.1 English

The I/O permutations for a 3D PFA solution are solved in a manner similar to the 2D case as shown in the following figure. Essentially, the modulo computations are extended to include a third dimension, and three modulo-inverses are required to solve for the output permutation. These permutations can be expressed in a 3D matrix form, or as a 1D address permutation \(P_i\) or \(P_o\). The 1D formulation is preferred as it matches how the design is implemented in hardware.

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