Compile and simulate the design to confirm it works as you expect.
[shell]% cd <path-to-design>/aie/tdm_fir
[shell]% make clean all
[shell]% vitis_analyzer aiesimulator_output/default.aierun_summary
Inspecting vitis_analyzer, observe that the resource count dropped to 32 tiles with a throughput = 4096/1.5us = 2730 MSPS.
Performance Comparison with Original Design:
Original (AIE-ML on VEK280): 32 tiles, 2230 MSPS throughput
Ported (AIE-ML v2 on VEK385): 32 tiles, 2730 MSPS throughput (+22% improvement)
Key Observation: AIE-ML v2 delivers superior performance with the same tile count, demonstrating architectural improvements in the second-generation AI Engine.