In the traditional hardware event trace, the trace information is stored in DDR memory available in the Versal device initially, and offloaded to SD card after the application run completes. This imposes limitations on the amount of trace information that can be stored and analyzed. AI Engine trace offload via HSDP(High Speed Debug Port) has more DDR memory in the SmartLynq+ module and supports analyzing large quantities of trace information for complex designs.
1. To run the event trace on hardware, it is required to compile the AI Engine graph with `-event-trace-port=plio` option. This sets the event tracing port to PLIO.
Note: If the event tracing port is set to GMIO, the AI Engine trace cannot be offloaded via HSDP.
Add `--aie.event-trace-port=plio` to AIE_FLAGS in Makefile
2. After the AI Engine graph and the C/C++ kernels are compiled, and any RTL kernels are packaged, the Vitis v++ --link command links them with the target platform to build the platform file (XSA). For offloading the AI Engine trace via HSDP, it is required to add the `–profile.aie_trace_offload=HSDP` option to the v++ -link command. Add below lines in system.cfg file
```
[profile]
aie_trace_offload=HSDP
```
With this, a new HSDP IP gets instantiated for AI Engine trace offload and all the PLIO event trace streams are connected to the HSDP IP. You can see System_DPA getting instantiated in VitisRegion.
3. Only the host program with XRT APIs controlling the AI Engine graph should be used for offloading AI Engine trace via HSDP.
4. Package the HSDP enabled XSA file generated during linking step and libadf.a to generate a sd_card image.