TDM FIR uses 32 AI Engine tiles with 32 IO streams
Implement the 4k-pt IFFT using 2D architecture (with Mode 1) with resources split between 16 AI Engine tiles (compute), 6 memory tiles (front/back transpose) and PL (middle transpose).
From a bandwidth perspective, the design requires 2 input and 4 output streams.
Build custom HLS blocks (split and merge) to manage connectivity between the IPs.
Output ports of AI Engine going to PL can arrive at different times causing minor throughput loss. You can compensate those by adding FIFOs during v++ linking step, Specifying-Streaming-Connections.