Design Summary - 2024.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2024-12-06
Version
2024.2 English
  • TDM FIR uses 32 AI Engine tiles with 32 IO streams

  • The 4k-pt IFFT is implemented using 2D architecture with resources split between 16 AI Engine tiles (compute) and PL (data transpose).

  • From a bandwidth perspective, the design requires 2 input and 4 output streams.

  • Custom HLS blocks (merge and split) are built to manage connectivity between the IPs.

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