Debug PL Kernels Using the Vivado Logic Simulator - Debug PL Kernels Using the Vivado Logic Simulator - 2025.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2026-03-27
Version
2025.2 English

This section shows you how to debug PL kernels in the Vivado logic simulator.

  1. In the Vitis IDE, launch hardware emulation using Vitis -> Start/Stop Emulator.

  2. Enable Show Waveform, and select Start.

  3. Vivado XSIM starts in standalone mode. Parallelly, observe messages in the Vitis IDE Emulation Console.

  4. Click Run in the Vivado XSIM GUI taskbar. Observe Linux bootup in the Vitis IDE Emulation Console.

  5. Observe data in XSIM while Emulation Console messages update in the Vitis IDE GUI.

  6. After processing completes, the Vivado XSIM Tcl Console shows the following messages:

    Info: (I804) /IEEE_Std_1666/deprecated: the notify() function is deprecated use sc_event::notify()
    // Interrupt Monitor : interrupt for ap_done detected @ "117153000"
    // Interrupt Monitor : interrupt for ap_ready detected @ "117153000"
    // Interrupt Monitor : interrupt for ap_done detected @ "118292000"
    // Interrupt Monitor : interrupt for ap_ready detected @ "118292000"
    // Interrupt Monitor : interrupt for ap_done detected @ "118478000"
    // Interrupt Monitor : interrupt for ap_ready detected @ "118478000"
    $stop called at time : 157304 ns
    run: Time (s): cpu = 00:00:36 ; elapsed = 00:03:57 . Memory (MB): peak = 13910.660 ; gain = 135.137 ; free physical = 23585 ; free virtual = 54027
    
    

    The following messages appear in the Vitis IDE DEBUG CONSOLE.

    XAIEFAL: INFO: Resource group Avail is created.
    XAIEFAL: INFO: Resource group Static is created.
    XAIEFAL: INFO: Resource group Generic is created.
    Input memory virtual addr 0x0xffff7fb56000x
    Output memory virtual addr 0x0xffff7fb55000x
    Output memory virtual addr 0x0xffff7fb54000x
    run mm2s
    run s2mm
    graph run
    graph end
    After MM2S wait
    After S2MM_1 wait
    After S2MM_2 wait
    TEST PASSED
    
  7. Observe the waveform in the Vivado XSIM GUI. The system contains one mm2s compute unit and two s2mm compute units. You can see them in the waveform viewer as follows:

    compute units

  8. To group signals, right-click anywhere in the Name column, and select New Group. Add all the MM2S and S2MM-related signals to this group by dragging them correspondingly. xsim waveform

  9. Zoom into the waveform window to locate transactions.

  10. The m_axi_gmem is the transaction level signal, which indicates the Read transaction in mm2s and write transaction in s2mm.

  11. The TDATA in mm2s shows the data read into the AI Engine module. To correlate with the number of iterations (seven) specified in the graph, observe TREADY going high when the AI Engine module is ready to read, and TVALID going high for all read transactions.

  12. Similarly, in s2mm_1, the TVALID indicates valid data. TLAST goes high at the end of each iteration and goes low at the start of the next iteration.

    Use this method to verify correct data movement to and from the AI Engine.